Proceedings of the Int'l Symposium on Quality Electronic Design (ISQED), pp. 699~702, San Jose, CA, March 2007.
This paper presents a simple yet effective method to analyze process variations using statistics on manufacturing in-line data without assuming any explicit underlying model for process variations. Our method is based on a variant of principal component analysis and is able to reveal systematic variation patterns existing on a die-to-die and wafer-to-wafer level individually. The separation of die variation from wafer variation can enhance the understanding of a nature of the process uncertainty. Our case study based on the proposed decomposition method shows that the dominating die-to-die variation and wafer-to-wafer variation represent 31% and 25% of the total variance of a large set of in-line parameters in 65nm SOI CMOS technology.